About N76E003AT20 Microcontroller
The N76E003 is an 8-bit microcontroller based on the 8051 architecture, with embedded flash memory and rich peripherals. It offers up to 18KBytes of main flash called APROM, which can be used for in-application programming and non-volatile data storage. The LDROM flash, with a maximum size of 4KBytes, is used for the boot code. The microcontroller is equipped with 18 sources of interrupts with 4-level priority capability. The system clock can be switched on-the-fly via software and can be slowed down with a software clock divider for a balance between execution performance and power consumption. It has two power modes, Idle and Power-down, which can be software-selectable to reduce power consumption. Overall, the N76E003 is well-suited for general-purpose, home appliance, or motor control system design.
Features of N76E003AT20 Microcontroller
This microcontroller has an 8-bit fully static design with a high-performance 1T 8051-based CMOS CPU, compatible with MCS-51 instruction sets. It has dual data pointers, 4-priority-level interrupts, and a wide operating frequency up to 16 MHz.
The clock sources include a 16 MHz high-speed internal oscillator and a 10 kHz low-speed internal oscillator, and can be switched on-the-fly via software.
The microcontroller has up to 18KBytes of APROM for User Code, configurable LDROM, 256 Bytes on-chip RAM, and 768Bytes on-chip auxiliary RAM.
There are up to 17 general purpose I/O pins, interrupt pins, timers/counters, pulse width modulators, ADC, SPI, and I2C bus, and power management modes.
The microcontroller has Brown-out detection, Power-on reset, and strong ESD and EFT immunity.
Development tools include Nuvoton On-Chip-Debugger, In-Circuit-Programmer, and In-System-Programming via UART.
Block Diagram and Functions
The core block contains the CPU and memory buses, which are connected to the CPU, RAM, and Flash memories. The CPU itself is an 8051, while the RAM is composed of 256 bytes of SRAM, and the Flash is composed of 8K of Flash program memory. This block also contains the power supply pins and the reset pin.
The bus block contains the address and data buses, which are used to connect the CPU with the peripherals. The address bus is connected to the peripheral registers, while the data bus is connected to their data ports. This block also includes the chip select pins, which allow the CPU to access the different peripherals.
The peripheral block includes all the peripheral interfaces such as UART, SPI, I2C, PWM, and ADC. This block also includes the external interrupt pin, which allows external devices to communicate with the microcontroller. Additionally, it also includes the voltage reference pins, which provide a stable reference voltage for the ADC operations.
N76E003AT20 Pinout Description
|1||P0.5/PWM2/IC6/T0/AIN4||P0.5: Port 0 bit 5.PWM2:PWM output channel2.IC6: Input capture channel 6.T0: External count input toTimer/Counter 0 or itstoggle output|
|2||P0.6/TXD/AIN3||P0.6: Port 0 bit 6.TXD: Serial port 0 transmitdata output.AIN3: ADC input channel 3.|
|3||P0.7/RXD/AIN2||P0.7: Port 0 bit 7. RXD: Serial port 0 receiveinput. AIN2: ADC input channel 2.|
|4||P2.0/RST||P2.0: Port 2 bit 0input pin available when RPD (CONFIG0.2) is programmed as 0.|
RST: RST pin is a Schmitt trigger input pin for hardware device reset. A lowon this pin resetsthe device. RST pin has an internal pull-upresistor allowing power-on reset by simply connecting an external capacitor to GND.
|5||P3.0/OSCIN/AIN1||P3.0: Port 3bit 0available whenthe internal oscillator is used as the system clock. External interrupt 0 input. XIN: If the ECLK mode is enabled, XINis the external clock input pin. AIN1: ADC input channel 1.|
|6||P1.7/AIN0||P1.7: Port 1bit 7. INT1: External interrupt 1 input. AIN0: ADC input channel 0.|
|7||GND||GROUND: Ground potential.|
|8||P1.6/ICPDA/OCDDA/TXD_1/[SDA]||P1.6: Port 1bit 6. ICPDA: ICP data input or output. OCDDA: OCD data input or output.TXD_1: Serial port 1 transmit data output. [SDA]: I2C data.|
|9||VDD||POWER SUPPLY:Supply voltage VDD for operation.|
|10||P1.5/PWM5/IC7/SS||P1.5: Port 1bit 5. PWM5: PWM output channel 5. IC7: Input capture channel 7. SS: SPI slave select input.|
|11||P1.4/SDA/FB/PWM1||P1.4: Port 1bit 4. SDA: I2C data. FB: Fault Brake input. PWM1: PWM output channel 1.|
|12||P1.3/SCL/[STADC]||P1.3: Port 1bit 3. SCL: I2C clock. [STADC]: External start ADC trigger|
|13||P1.2/PWM0/IC0||P1.2: Port 1bit 2. PWM0: PWM output channel 0. IC0: Input capture channel 0|
|14||P1.1/PWM1/IC1/AIN7/CLO||P1.1: Port 1 bit 1. PWM1: PWM output channel 1. IC1: Input capture channel1. AIN7: ADC input channel 7. CLO: System clock output.|
|15||P1.0/PWM2/IC2/SPCLK||P1.0: Port 1 bit 0. PWM2: PWM output channel2. IC2: Input capture channel2. SPCLK: SPI clock.|
|16||P0.0/PWM3/IC3/MOSI/T1||P0.0: Port 0 bit 0. PWM3: PWM output channel 3. MOSI: SPI master output/slave input. IC3: Input capture channel 3. T1: External count input to Timer/Counter 1 or its toggle output.|
|17||P0.1/PWM4/IC4/MISO||P0.1: Port 0 bit 1. PWM4: PWM output channel 4. IC4: Input capture channel 4. MISO: SPI master input/slave output.|
|18||P0.2/ICPCK/OCDCK/RXD_1/[SCL]||P0.2: Port 0 bit 2. ICPCK: ICP clock input. OCDCK: OCD clock input. RXD_1: Serial port 1 receive input. [SCL]: I2C clock.|
|19||P0.3/PWM5/IC5/AIN6||P0.3: Port 0 bit 3. PWM5: PWM output channel. IC5: Input capture channel 5. AIN6: ADC input channel 6.|
|20||P0.4/AIN5/STADC/PWM3/IC3||P0.4: Port 0 bit 4. AIN5: ADC inputchannel 5. STADC: External start ADC trigger. PWM3: PWM output channel 3. IC3: Input capture channel 3.|